About Our Research

Maecenas mattis enim consequat, viverra sapien interdum, rhoncus massa. Cras fringilla justo sit amet neque tincidunt, at vehicula odio fermentum. Interdum et malesuada fames ac ante ipsum primis in faucibus. Quisque in risus dictum, tempor quam nec, ornare dolor. Donec egestas quam id nunc fermentum porttitor. Integer maximus enim non magna dapibus suscipit. Nunc finibus vulputate dui, et iaculis arcu malesuada nec. Suspendisse feugiat ante blandit felis vehicula, pulvinar consectetur mi facilisis. Ut finibus eros in est finibus porta. Pellentesque sollicitudin sodales urna, et suscipit tortor condimentum a. Sed eu magna dictum, bibendum velit ac, maximus quam.

Go to top

Ongoing Research

Secure Hardware Verification

Supervisor(s): Leonid Azriel
Research document
Status: available

Security verification is a challenging task, since it requires coverage of a wider scenario space than functional verification. To address the security verification of software, the Common Weaknesses Enumeration taxonomy was introduced, a catalogue of software security issues. Nowadays, a variety of tools exist that try to find weaknesses in software code. Following the software path, a hardware CWE database was added and now includes hundreds of entries.
The question is whether specific methods from the software domain can be used in hardware security analysis. One software verification paradigm that might work for hardware is taint analysis, which is known in the hardware world as information flow tracking. Such analysis may use graph methods to track the information flow between different security domains. Early methods are limited to a small scale, due to the required intimate knowledge of every design detail and intrinsic algorithm limitations.
Two topics are suggested for the research:

Using Graph Neural Networks (GNN) to detect security vulnerabilities
Using Quantitative Information Flow (QIF) for secure hardware verification

Go to top